Bo Gao (髙 波) is interested in data converters with particular emphasis on high-speed high-resolution analog-to-digital converter (ADC), and related calibrations. (E-mail: gaobo@kaist.ac.kr)
Education
• Ph.D. in EE, KAIST, Daejeon, KR - (08/2020~11/2025) - Adviser: Prof. Seung-Tak Ryu Dissertation, ‘Design of High-Speed Pipelined ADC Based on the Closed-Loop Dynamic Residue Amplifiers’.
• M.S. in EE, SEU, Nanjing, CN - (09/2017~06/2020) - Adviser: Prof. Jianhui Wu Thesis, ‘Design of 16-Bit 32-MS/s Pipelined SAR ADC for Radar System’, M.S. Thesis Award of SEU.
• B.S. in EE, NUPT, Nanjing, CN - (09/2013~06/2017) - Adviser: Prof. Debo Wang Thesis, ‘Design of Radiation Monitoring System with Photodiode’, B.S. Thesis Award of Jiangsu Province.
Experience
South Korean National Researcher (No.13032983) -Mixed-Signal Integrated Circuits Laboratory (09/2020~Present)
• Samsung Project (08/2023~12/2024): Power-Efficiency High-Speed Pipelined ADC with Closed-Loop Dynamic Residue Amplifier Design of Single-Channel 12-bit 800-MS/s Pipelined ADC with Noise Reduction.
• Samsung Project (01/2022~07/2023): Ultrahigh Performance ADCs for SDR Applications Design of Single-Channel 12-bit 600-MS/s Pipelined ADC, (Published in ASSCC'24 & TCAS-I'25; Invited by SSCL).
• Samsung Project (09/2020~10/2021): Ring Amplifier with Adaptive Deadzone Control Design of Single-Channel 10-bit 320-MS/s Pipelined ADC, (Design Assistant).
Joint Training Engineer -Nanjing Low Power IC Technology Institute. (03/2018~12/2019)
• Design of Gainboosting Op-Amp in TSMC 40-nm CMOS.
• Design of Ultra-Low Power Incremental Sigma-Delta Modulator (ISDM) in TSMC 40-nm CMOS.
• Layout of Gainboosting Op-Amp and Clock Generator for 14-Bit Pipelined ADC in TSMC 0.18-μm CMOS.
Teaching Assistant (TA) • EE201-Circuit Theory, KAIST, Daejeon, KR. (03~06, 2025)
• IC Design Education Center (IDEC), DongTan, KR. (09~10, 2022)
• Analog Electronic Circuit, SEU, Nanjing, CN. (09~12, 2017)
Jinghao Zhao, Yihong Qing, Zheyi Li, Bo Gao, Jeffrey Prinzie, Frédéric Saigné, Paul Leroux, "A Wide-Range Body Biasing Technique for Analog ICs in 22nm FD-SOI Under Total Ionizing Dose Radiation Harsh Environment," RADiation Effects on Components and Systems (RADECS) Conference, Sep., 2024, pp.1-3.
Raymond Mabilangan, Bo Gao, Charlie Tahar, Kent Edrian Lozada, Dong-Jin Chang, and Seung-Tak Ryu, "A Single-Step Relative-Prime-Rotation Based Background Timing-Skew Calibration with MAD-Averaging," IEEE Open Journal of the Solid-State Circuits Society (OJ-SSCS), Under Review, Nov., 2025.
Kent Edrian Lozada, Bo Gao, Raymond Mabilangan, Kun-Woo Park, Charlie Tahar, Young-Hun Moon, Kwan-Hoon Song, and Seung-Tak Ryu, "A SAR-Assisted Continuous-Time M-0 MASH Delta-Sigma Modulator with Digital-Domain Noise Leakage Shaping," IEEE Open Journal of Circuits and Systems (OJCAS), Under Review, Nov., 2025.